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march 2012 ? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 fssd06 ? sd/sdio and mmc two-port multiplexer fssd06 ? sd/sdio and mmc two-port multiplexer features ? on resistance typically 4 ? , v ddh =2.7v ? f toggle : > 120mhz ? low on capacitance: 9pf typical ? low power consumption: 1a maximum ? conforms to secure digital (sd), secure digital i/o (sdio), and multimedia card (mmc) specifications ? supports 1-bit / 4-bit host controllers (v ddh =1.65v to 3.6v) communicating with high-voltage (2.7-3.6v) and dual-voltage cards (1 .65-1.95v, 2.7-3.6v) - v ddh =1.65 to 3.6v, v ddc1/c2 =v ddh to 3.6v ? 24-lead mlp (3.5 x 4.5mm) and umlp packages applications ? cell phone, pda, digital camera, portable gps ? lcd monitor, home theater pc/tv, all-in-one printer description the fssd06 is a two-port multiplexer that allows secure digital (sd), secure digital i/o (sdio), and multimedia card (mmc) host controllers to be expanded out to multiple cards or peripherals. this configuration enables the cmd, clk, and d[3:0] signals to be multiplexed to dual-card peripherals. it is optimized for 1-bit / 4-bit sd / mmc applications. the architecture includes the necessary bi-directional data and command transfer capability for single high- voltage cards or dual-voltage supply cards. the clock path for the fssd06 is a uni-directional buffer with an integrated pull-up for high-impedance mode. typical applications involve switching in portables and consumer applications: cell phones, digital cameras, home theater monitors, portable gps units, and printers. analog symbol diagram gnd 1clk 2clk dat[0:3], cmd clk control /oe s v ddc1 r pu 1dat[0:3], 1cmd 2dat[0:3], 2cmd v dd c2 r pu 5 5 5 vddc1 vddc2 vddh figure 1. analog symbol diagram ordering information part number operating temperature range package description packing method fssd06bqx -40c to +85c 24-lead molded leadless package (mlp), jedec mo- 220, 3.5 x 4.5mm tape & reel fssd06umx -40c to +85c 24-lead ultrathin molded leadless package (umlp) tape & reel
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 2 fssd06 ? sd/sdio and mmc two-port multiplexer pin configuration 12 11 6 7 8 9 10 15 17 18 19 2dat[0] /oe vddh s gnd 1 22423 13 14 3 4 5 20 21 22 dat[2] 1cmd 1clk dat[3] clk dat[0] cmd dat[1] 2cmd vddc2 1dat[1] 2dat[2] vddc1 1dat[2] 1dat[3] 1dat[0] 2dat[1] 2clk 2dat[3] 16 dat[3] cmd vddh gnd clk 1clk 2cmd dat[0] 1dat[0] 1dat[1] 2dat[3] 2dat[2] s dat[1] 2dat[1] 2dat[0] 2clk vddc2 1 2 3 4 5 6 24 10 9 8 7 14 13 12 11 19 18 17 16 15 23 22 21 20 dat[2] /oe 1dat[2] 1dat[3] 1cmd vddc1 figure 2. mlp pin assignments figure 3. umlp pin assignments pin definitions name description vddh power supply (host asic) vddc1, vddc2 power supply (sdio peripheral card ports) /oe output enable (active low) s select pin 1dat[3:0], 2dat[3:0], 1cmd , 2cmd sdio card ports dat[3:0], cmd sdio common ports clk, 1clk, 2clk clock path ports truth table /oe s function low low cmd, clk, dat[3:0] connected to 1cmd, 1clk, 1dat[3:0]; 2clk pulled high via r pu low high cmd, clk, dat[3:0] connected to 2c md, 2clk, 2dat[3:0]; 1clk pulled high via r pu high x all ports high impedance; 1clk, 2clk pulled high via r pu
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 3 fssd06 ? sd/sdio and mmc two-port multiplexer typical application diagram cmd, dat[3:0] 5 1.65 ? 3.60v wifi, bluetooth, mmc or sd module processor vddh gnd /oe s 1cmd, 1dat[3:0] fssd06 secure data / multimedia card 2:1 peripheral expander clk 1clk 5 2cmd, 2dat[3:0] wifi, bluetooth, mmc or sd module , , 2clk 5 v dd h to 3.6v vddc1 v dd h to 3.6v vddc2 gnd r t gnd r t note : external resistors (r t ) are recommended if card supplies are allowed to float in the application. the resistors should be >500k to minimize power consumption. figure 4. typical application diagram functional description the fssd06 enables s haring the asic/baseband processor sdio port(s) to two peripheral cards, providing bi-directional support for dual-voltage sd/sdio or mmc cards available in the marketplace. each sdio port of the fssd06 has its own supply rail, allowing peripheral cards with different supplies to be interfaced to the host. the peripheral card supplies must be equal or greater than the host to minimize power consumption. the independent v ddh , v ddc1 , and v ddc2 are defined by the supp lies connected from the application power management ics (pmics) to the fssd06. the clock path is a uni-directional buffered path rather than a bi-directional switch port. cmd, dat bus pull-ups the 1cmd, 2cmd, 1dat[3:0], and 2dat[3:0] ports do not have, internally, the sy stem pull-up resistors as defined in the mmc or sd card system bus specifications. the syst em bus pull-up must be added external to the fssd06. the value, within the specific specification limits, is a function of the individual application and type of card or peripheral connected. for sd card applications, the r cmd and r dat pull-ups should be between 10k ? and 100k ? . for mmc applications, the r cmd pull-ups should be between 4.7k ? and 100k ? and the r dat pull-ups between 50k ? and 100k ? . the card-side 1cmd, 2cmd, 1dat[3:0], and 2dat[3:0] outputs have a circuit that facilitates incident wave switching, so the exter nal pull-up resistors ensure retention of the output high level. the /oe pin can be used to place the 1cmd, 2cmd, 1dat[3:0] and 2dat[3:0] into high-impedance mode when the system enters idle state ( see idle state cmd/dat bus ?parking? ). clk bus the 1clk and 2clk outputs are bi-state buffer architectures, rather than a switch i/o, to ensure 52mhz incident wave switching. when there is no communication on the bus (idle), the fssd06 can be disabled with the /oe pin. when this pin is pulled high, the nclk outputs are also pulled high. along with ncmd, ndat[3:0] goes high-impedance to ensure that the clk path between the fssd06 and the peripheral does not float. idle state cmd/dat bus ?parking? the sd and mmc card specifications were written for a direct point-to-point communication between host controller and card. the introduction of the fssd06 in that path, as an expander, r equires that the functional operation and system latenc y not be impacted by the fssd06 switch characteristi cs. since there are various card formats, protocols, and configurable controllers, a /oe pin is available to facilit ate a fast idle transition for the ncmd/ndat[3:0] outputs. some controllers, rather than simply placing cmd/dat into high-impedance mode, may pull their outputs high for a clock cycle prior to going into high-impedance mode (referred to as ?parking? the output). some legacy controllers pull their outputs high versus high impedance. if the /oe pin is left low and the controller places the cmd/dat[3:0] outputs in to high impedance, the ncmd/ndat[3:0] output rise ti me is a function of the rc time constant through t he switch path. it is recommended that the host controller pull cmd and dat[3:0] high for one cycle before pulling /oe high. this facilitates parking a ll ncmd/ndat[3:0] outputs high before putting the switch i/os in high impedance.
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 4 fssd06 ? sd/sdio and mmc two-port multiplexer absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stre sses above the recommended operating conditi ons may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter conditions min. max. unit v ddh supply voltage -0.5 4.6 v v ddc1 ,v ddc2 supply voltage -0.5 4.6 v v sw (1) switch i/o voltage 1dat[3:0], 2dat[3:0], 1cmd, 2cmd pins -0.5 v ddx (2) + 0.3v (4.6v maximum) v dat[3:0], cmd pins -0.5 v ddx (2) + 0.3v (4.6v maximum) v v cntrl (1) control input voltage s, /oe -0.5 4.6 v v clki (1) clk input voltage clk -0.5 4.6 v v clko (1) clk output voltage 1clk, 2clk -0.5 v ddx (2) + 0.3v (4.6v maximum) v i indc input clamp diode current -50 ma i sw switch i/o current sdio continuous 50 ma i swpeak peak switch current sdio pulsed at 1ms duration, <10% duty cycle 100 ma t stg storage temperature range -65 +150 ? c t j max junction temperature +150 ? c t l lead temperature solderi ng, 10 seconds +260c ? c esd human body model (jedec: jesd22-a114) i/o to gnd 8 kv supply to gnd 9 all other pins 5 charged device model (jedec: jesd22-c101) 2 kv notes: 1. the input and output negativ e ratings may be exceeded if the input and out put diode current ratings are observed. 2. v ddx references the specific sdio port v dd rail (i.e. v ddc1 , v ddc2 , v ddh ). recommended operating conditions the recommended operating conditions table defines the conditions for actual device oper ation. recommended operating conditions are specified to ens ure optimal performance to the datasheet specificat ions. fairchild does not recommend exceeding them or designi ng to absolute maximum ratings. symbol parameter minimum maximum unit v ddh supply voltage - host side 1.65 3.6v v v ddc1, v ddc2 supply voltage - sdio cards v ddh 3.6v v v cntrl control input voltage - v s ,v /oe 0 v ddh v v clki clock input voltage - v clki 0 v ddh v v sw switch i/o voltage - cmd, dat[3:0] 0 v ddh v switch i/o voltage - 1cmd, 1dat[3:0] 0 v ddc1 v switch i/o voltage - 2cmd, 2dat[3:0] 0 v ddc2 v c operating temper ature -40 +85 c ? ja thermal resistance (free air), mlp24 50 c/w
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 5 fssd06 ? sd/sdio and mmc two-port multiplexer dc electrical characteristics at 1.8v v ddh all typical values are for v ddh =1.8v at 25c unless otherwise specified. symbol parameter v ddc1 / v ddc2 (v) conditions t a =- 40c to +85c unit min. typ. max. common pins v ik clamp diode voltage 2.7 i ik= -18ma -1.2 v v ih control input voltage high 2.7 v ddh =1.65v 1.3 v il control input volt age low 2.7 0.5 i in s, /oe input high current 3.6 v ddh =1.95v, v cntrl= 0v to v ddh -1 1 a i oz off leakage, current of all ports 3.6 v ddh =1.95v, v sw =0v to v ddx -1.0 0.5 1.0 a i pu clk pull-up current 3.6 v clki =v ddh v clko =0v, /oe=v ddh 35 a v ohc clk output voltage high 2.7 i oh =-2ma 2.4 v v olc clk output voltage low 3.6 i ol =-2ma 90 mv r pu clk pull-up resistance (3) 50 100 k ? r on switch on resistance (4) 2.7 v cmd, dat[3:0]= 0v, i on= -2ma, see figure 5 4 6 ? ? r on delta on resistance (4, 5) 2.7 v cmd, dat[3:0]= 0v, i on= - 2ma 0.8 ? power supply i cc(vddh) quiescent supply current (host) 0 v ddh =1.95v, v sw= 0 or v ddh , i out =0 1 a i cc(vddc1, vddc2) quiescent supply current (sdio cards) 3.6 v sw= 0 or v ddx, i out =0, v clki =v ddh , v clko =open, /oe=0v 1 a ? i card delta i cc(vddc1, vddc2) for one card powered off 3.6v / 0v v sw= 0 or v ddx, i out =0, v clki =v ddh , v clko =open, /oe=0v 1 a notes: 3. guaranteed by characteriza tion, not production tested. 4. on resistance is determined by the vo ltage drop between the switch i/o pins at t he indicated current through the switch. 5. ? r on =r on max ? r on min measured at identical v cc , temperature, and voltage.
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 6 fssd06 ? sd/sdio and mmc two-port multiplexer dc electrical characteristics at 2.7v v ddh all typical values are for v ddh =2.7v at 25c unless otherwise specified. symbol parameter v ddc1 / v ddc2 (v) conditions t a =- 40c to +85c unit min. typ. max. common pins v ik clamp diode voltage 2.7 i ik= -18ma -1.2 v v ih control input voltage high 2.7 v ddh =2.7v 1.8 v il control input volt age low 2.7 0.8 i in s, /oe input high current 3.6 v ddh =3.6v, v cntrl= 0v to v ddh -1 1 a i oz off leakage current of all ports 3.6 v ddh =3.6v, v sw =0v to v ddx -1.0 0.5 1.0 a i pu clk pull-up current 3.6 v clki =v ddh, v clko =0v, /oe=v ddh 50 a v ohc clk output voltage high 2.7 i oh =-2ma 2.4 v v olc clk output voltage low 3.6 i ol =-2ma 90 mv r pu clk pull-up resistance (6) 50 100 k ? r on switch on resistance (7) 2.7 v cmd, dat[3:0]= 0v, i on= -2ma see figure 5 2.5 6.0 ? ? r on delta on resistance (7,8) 2.7 v cmd, dat[3:0]= 0v, i on= - 2ma 0.8 ? power supply i cc(vddh) quiescent supply current (host) 0 v ddh =3.6v, v sw= 0 or v ddh , i out =0 1 a i cc(vddc1, vddc2) quiescent supply current (sdio cards) 3.6 v sw= 0 or v ddx, i out =0, v clki =v ddh , v clko =open, /oe=0v 1 a ? i card delta i cc(vddc1, vddc2) for one card powered off 3.6v/0v 0v/3.6v v sw= 0 or v ddx, i out =0, v clki =v ddh , v clko =open, /oe=0v 1 a notes: 6. guaranteed by characteriza tion, not production tested. 7. on resistance is determined by the vo ltage drop between the switch i/o pins at t he indicated current through the switch. 8. ? r on =r on max ? r on min measured at identical v cc , temperature, and voltage.
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 7 fssd06 ? sd/sdio and mmc two-port multiplexer ac electrical characteristics at 1.8v v ddh all typical values are for v ddh= 1.8v at 25c unless ot herwise specified. symbol parameter v ddc1 / v ddc2 (v) conditions t a =- 40c to +85c unit min. typ. max. t on1 turn-on time, s, /oe to cmd, dat[3:0] 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 10 24 ns t off1 turn-off time, s, /oe to cmd, dat[3:0] 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 7 22 ns t pd switch propagation delay (9) 2.7 to 3.6 see figure 9 1 ns t skew switch skew (9, 10) cmd, dat[3:0] 2.7 to 3.6 r l =1k ? , c l =30pf 2 ns t on2 turn-on time, s, /oe to 1clk, 2clk 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 17 35 ns t off2 turn-off time s, /oe to 1clk, 2clk 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 10 28 ns t pdclk clock propagation delay 2.7 to 3.6 r l =1k ? , c l =30pf see figure 11 3.0 5.5 ns o irr off isolation (9) 2.7 to 3.6 f=10mhz, r t= 50 ? , c l =30pf, see figure 12 -60 db xtalk non-adjacent channel crosstalk (9) 2.7 to 3.6 f=10mhz, r t= 50 ? , c l =30pf, see figure 13 -60 db f toggle clock frequency (9) 2.7 to 3.6 c l =30pf 120 mhz notes: 9. guaranteed by characteriza tion, not production tested. 10. skew is determined by |t plh - t phl | for worst-case temperature and v ddx .
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 8 fssd06 ? sd/sdio and mmc two-port multiplexer ac electrical characteristics at 2.7v v ddh all typical values are for v ddh =2.7v at 25c unless otherwise specified. symbol parameter v ddc1 / v ddc2 (v) conditions t a =- 40c to +85c unit min. typ. max. t on1 turn-on time s, /oe to cmd, dat[3:0] 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 8 17 ns t off1 turn-off time s, /oe to cmd, dat[3:0] 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 6 13 ns t pd switch propagation delay (11) 2.7 to 3.6 see figure 9 1 ns t skew switch skew (12) cmd, dat[3:0] 2.7 to 3.6 r l =1k ? , c l =30pf 1.5 ns t on2 turn-on time s, /oe to 1clk, 2clk 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 15 25 ns t off2 turn-off time s, /oe to 1clk, 2clk 2.7 to 3.6 v sw =0v, r l =1k ? , c l =30pf see figure 7, figure 8 10 25 ns t pdclk clock propagation delay 2.7 to 3.6 r l =1k ? , c l =30pf see figure 11 1.5 3.0 ns o irr off isolation (11) 2.7 to 3.6 f=10mhz, r t= 50 ? , c l =30pf see figure 12 -60 db xtalk non-adjacent channel crosstalk (11) 2.7 to 3.6 f=10mhz, r t= 50 ? , c l =30pf see figure 13 -60 db f toggle clock frequency (11) 2.7 to 3.6 c l =30pf 120 mhz notes: 11. guaranteed by characteriza tion, not production tested. 12. skew is determined by |t plh - t phl | for worst-case temperature and v ddx . capacitance symbol parameter conditions t a =- 40c to +85c unit min. typ. max. c in (s, /oe, clk) control and clk pin input capacitance v ddh= 0v 2.5 pf c on common port on capacitance (c dat[3:0], cmd ) v ddh= 1.8v,v ddc1= v ddc2= 2.7v, v /oe= 0v, v bias =0v, f=1mhz see figure 15 9.0 c off input source off capacitance v ddh= 1.8v,v ddc1= v ddlh2= 2.7v, v /oe= 3.3v, v bias =0v, f=1mhz see figure 14 4.0
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 9 fssd06 ? sd/sdio and mmc two-port multiplexer test diagrams selec t ndat[3:0],ncmd dat[3:0],cmd v s = 0 or v ddl i on v on r on = v on /i on gnd v in gnd selec t dat[3:0],cmd v s v ddl i on v on gnd gnd v in gnd v in gnd gnd gnd select v s = 0 orv ddl nc a i oz v in gnd v i oz v in gnd v in gnd gnd gnd figure 5. on resistance figure 6. off leakage (each switch port is tested separately) r l ,r s , and c l are function of application environment (see ac tables for specific values) c l includes test fixture and stray capacitance c l r l gnd gnd r s v s v sw gnd v out dat[3:0], cmd ndat[3:0],ncmd v ddx v v out v t rise =2.5ns gnd v ddx 90% 90% 10% 10% t fall =2.5ns v ddx /2 v ddx /2 input - v cntrl output - v out 50% v oh v ol t off t on vol + 0.15v - figure 7. ac test circuit load figure 8. turn on/off time waveforms t rise =2.5ns gnd v ddx 90% 90% 10% 10% t fall =2.5ns v ddx /2 v ddx /2 input - v sw output- v out 50% 50% v oh v ol t plh t phl rise gnd t fall /2 v ddx /2 - - v plh phl /2 - - c l r l gnd gnd r s v s v clki gnd v out 1clk, 2clk clk v ddx r s clki v out r l ,r s ,andc l are function of application environment (see ac tables for specific values) c l includes test fixture and stray capacitance figure 9. switch propagation delay waveform figure 10. ac test circuit load (clk)
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 10 fssd06 ? sd/sdio and mmc two-port multiplexer test diagrams (continued) t rise =2.5ns gnd v ddx 90% 90% 10% 10% t fall =2.5ns v ddx /2 v ddx /2 input - v clki output -v clko 50% 50% v ohc v olc t plh t phl r s and r t are function of application environment (see ac tables for specific values) v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd v s gnd off -isolation = 20 log (v out /v in ) v in out r t gnd r t gnd gnd gnd gnd r s r s -isolation = 20 log (v out /v in ) v in v in figure 11. clk propagation delay waveforms figure 12. channel off isolation v out gnd gnd r t gnd gnd v s r s network analyzer r t gnd r s and r t are function of application environment (see ac tables for specific values) v s gnd nc crosstalk = 20 log (v out /v in ) v in figure 13. channel-to-channel crosstalk v s = 0 orv ddh capacitance meter s f =1mhz,v bias =0v ndat[3:0], ncmd, nclk ndat[3:0], ncmd, nclk v s = 0 or v ddh capacitance meter s f=1mhz,v bias =0v ndat[3:0], ncmd, nclk figure 14. channel off capacitance figure 15. channel on capacitance
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 11 fssd06 ? sd/sdio and mmc two-port multiplexer tape and reel specifications package designator tape selection number cavities cavity status cover tape status mpx leader (start end) 125 (typical) empty sealed carrier 3000 filled sealed trailer (hub end) 75 (typical) empty sealed tape dimensions dimensions are in millimeter s unless otherwise noted. reel dimensions dimensions are in inches (millim eters) unless otherwise noted. tape size a b c d n w1 w2 13.000 0.059 0.512 0. 795 2.165 0.488 0.724 (12.00mm) (330.00) (1.50) (13.00) (20.00) (55. 00) (12.40) (18.40)
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 12 fssd06 ? sd/sdio and mmc two-port multiplexer physical dimensions figure 16. 24-lead molded leadless package package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 13 fssd06 ? sd/sdio and mmc two-port multiplexer physical dimensions top view bottom view recommended land pattern 0.10 c 0.08 c b a c 0.10 c 2x 2x side view seating plane 0.10 c 0.05 0.00 7 13 1 0.10 c a b 0.05 c 0.55 max. pin #1 ident 19 2.50 3.40 0.40 0.15 0.25 24x 0.45 0.55 0.35 0.45 23x 0.15 24 3.70 2.80 2.23 2.23 1 7 13 19 24 0.40 0.56 0.23 0.66 figure 17. 24-lead ultrathin molded leadless package package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2007 fairchild semiconductor corporation www.fairchildsemi.com fssd06 ? rev. 1.0.5 14 fssd06 ? sd/sdio and mmc two-port multiplexer

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